1. Field of the Invention
Methods and apparatuses consistent with the present invention relate to a signal converter, a radio frequency identification (RFID) tag having the same, and a method of driving the RFID. More particularly, methods and apparatuses consistent with the present invention relate to a signal converter which performs stable conversion of input signal by extending operational margin, an RFID tag having the signal converter and a method of driving the RFID tag.
2. Description of the Related Art
As computer technologies and image recognizing technologies develop, many information recognition technologies have been introduced, and information recognition using a barcode as a medium is widely used. However, as the barcode information recognition requires contacting a barcode reader to the barcode for information identification, and the barcode stores limited information, the barcode system has a limited range of applications.
Therefore, in order to make broader information recognition range possible, a contactless information recognition device and a device having a high capacity memory is required.
A radio frequency identification (RFID) tag using radio frequency draws attention as a device that can satisfy the above requirements.
In general, the RFID tag is used with an RFID reader, and there are active and passive type RFID tags according to types of power source. The active method drives the RFID tag by a battery to output stored tag data from the RFID tag. The passive method generates an induced current using a magnetic field by electric power energy output from the RFID reader, and uses voltage of the induced current as a driving power to output stored tag data from the RFID tag.
The RFID tag transmits and receives data to and from the RFID reader through an antenna. To this end, the RFID tag requires a signal converter which receives a data signal modulated as an analog format and demodulates the data signal as a digital format.
The performance of the signal converter depends on how exactly it can recover the data signal from the RFID reader. Additionally, a low-power consumption function is also required.
FIG. 7 is a circuit diagram illustrating a general RFID tag. More specifically, the RFID tag of FIG. 7 is a “A Low-Power CMOS Integrated Circuit for Field-Powered Radio Frequency Identification Tags” which was introduced in ISSCC97 SESSION17/PAPER17.5. FIG. 7 particularly shows a signal converter having a demodulation circuit.
Referring to FIG. 7, reader data R_data and a reader clock R_clk, which are output from an RFID reader (not shown), are transmitted to an antenna as an analog signal, and induced in the antenna as an alternating current (AC) signal. The induced AC signal is transmitted to a packet assembly and disassembly (PAD), which is connected to the antenna of the RFID tag. The AC signal transmitted to the PAD is rectified and smoothed by a first signal converter including a first diode D1, a second diode D2 and a first capacitor C1, to be converted into a power signal VDD of a direct current (DC) component.
The AC signal transmitted to the PAD is also rectified and smoothed by a second signal converter including a third diode D3, a fourth diode D4 and a second capacitor C2, to be converted into a first demodulation signal V_sig1 of a DC component.
The first capacitor C1 has the electrostatic capacitance higher than the second capacitor C2 so that the power signal VDD has the smoothing degree higher than the first demodulation signal V_sig1.
A first transistor Tr1 is formed for biasing or limiting currents.
It can be constructed that the first demodulation signal V_sig1 transmitted to a first node N1 is converted and output into a digital signal by a buffer Buf including an inverter and so on, which are serially connected to each other. Additionally, if a low frequency RF is used, the capacitance of the second capacitor C2 increases. If the capacitance of the second capacitor C2 increases, a discharge current grounded to a ground terminal GND through the first transistor Tr1 increases. In this case, by further including a signal detector including a second through fifth transistors Tr2-Tr5 and a third capacitor C3, it can be constructed that after the first demodulation signal V_sig1 transmitted to the first node N1 is detected and amplified to be converted into a second demodulation signal V_sig2, the second demodulation signal V_sig2 is transmitted to the buffer Buf.
As shown in FIG. 8, a conventional RFID tag having the above structure compares the first or second demodulation signal V_sig1 or V_sig2 transmitted to the buffer Buf, and a reference signal V_ref1 transmitted from the outside to generate a digital signal D_sig of logical value “0” or “1”.
For example, if the first or second demodulation signal V_sig1 or V_sig2 transmitted to the buffer Buf has the electric potential level higher than the reference signal V_ref1, logical value “1” is generated. If the first or second demodulation signal V_sig1 or V_sig2 has the electric potential level lower than the reference signal V_ref1, logical value “0” is generated. This way, the input analog signal, and especially the reader data R_data which are input as the analog format, are converted and output into a digital signal D_sig.
When a data signal is converted according to the above method, as shown in FIG. 9, if the first or second demodulation signal V_sig1 or V_sig2 forms a peak-to-peak value across the reference signal V_ref1, logical value “0” or “1” can be calculated to convert into a digital signal D_sig. However, as shown in FIG. 10, if the first or second demodulation signal V_sig1 or V_sig2 forms a peak-to-peak value below or over the electric potential level of the reference signal V_ref1, an analog signal transmitted from the antenna, that is, the reader data R_data cannot be accurately converted into a digital signal D_sig using the reference signal V_ref1.